Sundance Multiprocessor Technology Limited Form : QCF42 User Manual Date : 6 July 2006 Unit / Module Description: IEEE-754 Floating-point FPGA IP Co
5 Critical signal descriptions All interface and internal operation of the core is synchronous to CLK. Simple SYNC strobes are used on the input and
6 Core assumptions Following SYNC_IN, the initial transform has a start-up latency dependent on the bit-reversal stage, the floating point core laten
User Manual FC100 Page 12 of 12 Last Edited: 25/11/2008 15:00:00 9 Ordering Information This product is available directly from Sundance Multiproc
Revision History Issue Changes Made Date Initials1.0 First release 25/11/08 SM User Manual FC1
Table of Contents 1 Introduction...
1 Introduction The Fast Fourier Transform (FFT) is an efficient algorithm for computing the Discrete Fourier Transform (DFT). This Intellectual Prop
2 Related Documents 2.1 Referenced Documents N/A 3 Acronyms, Abbreviations and Definitions 3.1 Acronyms and Abbreviations A list of all acronyms
4 Functional Description 4.1 Mathematical equations The Discrete Fourier Transform (DFT), of length N (N=2m), calculates the sampled Fourier transfo
4.3 Pipelined FFT core 4.3.1 Data format This core is compliant to the IEEE-754 standard. 4.3.2 FFT block diagram 4.3.3 Description Fr
4.3.4 Core modifications The standard IP Core is available in netlist or parameterized source code and supports the following: Netlist builds for
4.3.5 Parameters and ports definition The core signal I/O have not been fixed to specific device pins to provide flexibility for interfacing with use
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